It is known that silicides in source and/or drain regions can induce strain in channels of metal-oxide-semiconductor field-effect transistor (MOSFET) devices. A silicide in the source/drain (SD) is typically a result of the reaction of a metal layer with SD/channel materials of the semiconductor device. Studies of nickel (Ni), cobalt (Co) and titanium (Ti) silicides used in source and drains for silicon (Si) CMOS technologies, show that the resulting strains induced by silicides on the channel are typically tensile, and originate mostly from the difference in thermal expansion coefficients between the silicide and the substrate/channel material.
Typically, the silicide formation does not result by itself in a net stress since the temperature of the last silicidation step which forms the final silicide phase is typically above or around a silicide-silicon interface relaxation temperature. Upon cooling, a tensile stress is typically developed due to the higher coefficient of thermal expansion of silicides when compared to silicon. However, stress due to difference in thermal expansion coefficient between silicide and substrate or channel is limited. On the other hand, the reaction of a metal film with a semiconductor, may lead to the formation of a compound (silicide if the semiconductor is Si) that occupies typically less volume than the combined volumes of the reacting metal and semiconductor layers. If the available volume is constrained, for example by encapsulation, although some tensile strain may be developed, however, the main result in this case is the formation of voids. That is, most of the reduction of volume is accommodated by the creation of voids, with little or no tensile strain resulting.
Accordingly, it would be desirable to provide an improved metal source-drain stressor for tensile channel stress.